The IEEE standard for floating point execution is IEEE standard 754 adopted in the mid 1980s and used since that time. However, for floating point units (which may be part of a chip or a separate chip or other functional module of the computer system) which desirably would pipeline execution of the IEEE 754's standard denormalized numbers there has been a problem all this time.
There are several methods for handling an intermediate result which needs to be denormalized. There are methods for software handling, hardware handling with an auxiliary unit, or hardware handling with expensive logic devoted to early detection. A lower cost method is needed with better performance than we think obtainable by software handling. The problem is that the detection of exponent underflow which could result in a denormalized number is not determined until late in the pipeline. To date there has been no satisfactory solution.